Wire-frame drawing을 위한 가속기의 설계및 제작 = Design and implementation of the accelerator for a wire-frame drawing

• 서명 / 저자: Wire-frame drawing을 위한 가속기의 설계및 제작 = Design and implementation of the accelerator for a wire-frame drawing / 전찬호.
• 발행사항: [서울 : 한국과학기술원, 1989].

This paper describes the design and implementation of Wire-Frame Drawing Accelerator. This accelerator consists of Geometry Engine (GE), Line Drawing Accelerator (LDA) and Video System Controller (VSC).
In this Wire-Frame Drawing Accelerator, GE with the floating-point processor, Am29325, performs geometry operations of viewing transformation, perspective scaling and clipping. LDA generates the address of the pixel data between start point and end point of a line, which was implemented using TTL components. VSC manages the frame buffer and refreshes CRT and VRAM periodically.
The graphics accelerator implemented in board level operates on the IBM-PC AT and has the performance of processing and displaying about ten thousands of 4 sided polygons per second.

• 형태사항: [ii], 56 p. : 삽화 ; 26 cm
• 언어: 한국어
• 일반주기: 부록 수록 ; 저자명의 영문표기 : Chan-Ho Jun ; 지도교수의 한글표기 : 경종민 ; 지도교수의 영문표기 : Chong-Min Kyung
• 학위논문: 학위논문(석사) - 한국과학기술원 : 전기및전자공학과,
• 서지주기: 참고문헌 : p. 34-35
• 주제: Floating-point arithmetic. ; Transistor-transistor logic circuits. ; Picture frames and framing. ; TTl. --과학기술용어시소러스 ; 컴퓨터 그래픽. --과학기술용어시소러스 ; 부동 소수점 연산. --과학기술용어시소러스 ; 버퍼 방식. --과학기술용어시소러스 ; 화소 (화상). --과학기술용어시소러스 ; Computer graphics --Equipment and supplies.