This paper describes the design and implementation of Wire-Frame Drawing Accelerator. This accelerator consists of Geometry Engine (GE), Line Drawing Accelerator (LDA) and Video System Controller (VSC).
In this Wire-Frame Drawing Accelerator, GE with the floating-point processor, Am29325, performs geometry operations of viewing transformation, perspective scaling and clipping. LDA generates the address of the pixel data between start point and end point of a line, which was implemented using TTL components. VSC manages the frame buffer and refreshes CRT and VRAM periodically.
The graphics accelerator implemented in board level operates on the IBM-PC AT and has the performance of processing and displaying about ten thousands of 4 sided polygons per second.