Digital Baseband Processor is implemented for 2.4GHz LR-WPAN(Low Rate - Wireless Personal Area Network). And 30cm wireless “Light Control” was demonstrated using integrated systems including PHY, MAC, LLC and Application layer. Transmit PSD mask is satisfying the standard. Demodulator is designed to satisfy 1% PER at SNT=14dB with timing estimator and noncoherent detector. PHY digital is fully designed by verilog HDL and implemented in Xilinx FPGA xcv2000e with 135,436 gates.
