To apply the Cu metalization process to the actual semiconductor device fabrication, an systematic study on the Cu CVD process and characterization of the CVD-Cu film is in need. In addition, the sub-technologies such as the barrier layer fabrication and the patterning must also be established.
Although there have been some reports about the role of diffusion barriers that prevent interdiffusion between the Cu films and silicon substrates at high temperature, little investigation about the properties of the CVD Cu film itself at high temperature have been made.
The objectives of this work can be summarized into two categories ; One is to compare the properties of annealed Cu thin films with those of as-deposited films, and the other is to investigate the effect of microstructure on the electrical resistivities of annealed Cu films.
