As a great development of IC technology, especially digital circuitry, it is very important to connect between analog and digital circumstances. The A/D and D/A converters are basic building blocks which connect analog to digital world or vice versa. This circuitry requires high frequency sampling rate and high resolution as possible. But device matching property is not as good as to achieve high resolution above 10 bits. This difficulty can be degraded by using sigma-delta modulator technique. But the technique has been only suitable to low frequency application, such as voice signal, and ISDN. High resolution converters, however, are also required in the fields of High frequency applications, video signal processing, digital oscilloscope, HDTV and so on. In this thesis, a new architecture is presented for a 5th order sigma-delta modulator. This new architecture has capability of increasing SNR without frequency oveloading to acheve high resolrution or SNR. This technique uses mutibit A/D converter and digital correction filter and is also applicable to any other different types of sigma-delta modulator, i.g., MASH architecture. Moreover, this thesis will consider stability problem, simple approximated analytic solution for predicting SNR, comparator design, integrator design, and thermal noise problem. As a result, it is possible to achieve above 8 bit resolution on input signal of DC to 4 MHz at a clock frequency of 64 MHz with an oversampling ratio of 8.
