This thesis is composed of two parts. Firstly, a direct conversion(zero-IF) receiver scheme is compared with conventional double super-heterodyne receiver(DSH). It is found that zero-IF can decrease hardware complexity drastically with much more stringent requirement for Q and order of low-pass filter as well as the phase-noise of the local oscillator. Detail study shows that zero-IF is feasible for pager application with state of the art technology, while much more improvement is needed for AMPS cellular phone. Secondly, an analog CMOS FM IF IC, which is composed of a high frequency mixer with a 3rd-overtone crystal oscillator, high gain IF-amplifiers, a quadrature FM demodulator, and a voltage reference, is designed for the application of low power cellular phone. The IF IC meets the EIA specifications for AMPS (Advanced Mobile Telephone System), and operates up to 100MHz FM input at the low power supply (+3V).
HSPICE simulation results show low power consumption of 22 mW at 3 V, and good THD (Total Harmonic Distortion) of -34 dB with the model parameters of 0.8㎛ doublepoly CMOS process. The effective chip area is 4.5mm × 2mm.
