서지주요정보
URAN 신경망 칩을 이용한 숫자음 인식 시스템의 구현에 관한 연구 = Implementation of an MLP-based spoken digit recognition system using the URAN neural chip
서명 / 저자 URAN 신경망 칩을 이용한 숫자음 인식 시스템의 구현에 관한 연구 = Implementation of an MLP-based spoken digit recognition system using the URAN neural chip / 이준희.
저자명 이준희 ; Lee, Jun-Hee
발행사항 [대전 : 한국과학기술원, 1994].
Online Access 원문보기 원문인쇄

소장정보

등록번호

8004927

소장위치/청구기호

학술문화관(문화관) 보존서고

MIC 94022

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도서상태

이용가능

대출가능

반납예정일

등록번호

9000929

소장위치/청구기호

서울 학위논문 서가

MIC 94022 c. 2

SMS전송

도서상태

이용가능

대출가능

반납예정일

초록정보

The large computational requirements and the massively parallel architecture of neural networks have led to a number of hardware implementations. In this thesis, we describe an implementation of the spoken digit recognition system using VLSI neural network chip; Universally Reconstructable Artificial Neural-network (URAN) chip developed by Korea Telecom. The spoken digit recognition system consists of a PC/AT host computer, a DSP board for speech data acquisition and feature extraction, and a prototype neural board including the URAN chip. The URAN chip operates in analog-digital mixed mode, and consists of a decoder and four modules of synapse cells. Each module provides 8 inputs and 8 outputs to yield 8x8 synapse cells. The neural network board consists of two URAN chips, three 32 kbyte SRAMs for storing weight values to be downloaded to URAN chip every 10ms speech frame. two 10,000 gates Field-Programmable Gate Array (FPGA) chips for implementing off-chip digital logic, data converters (A/Ds and D/As), and integrators for cummulating the output current of synapse cells. One FPGA chip contains circuits for interfacing to the host computer, and for generating the pulse stream to be applied to the inputs of synapse cells. Another FPGA chip includes 16 pairs of adders and registers for calculating weighted-sum of inputs to neurons. The output function of neurons is carried out on the DSP board. All operations in the neural network board are done in about 800 clock cycles.

서지기타정보

서지기타정보
청구기호 {MIC 94022
형태사항 iv, 56 p. : 삽도 ; 26 cm
언어 한국어
일반주기 저자명의 영문표기 : Jun-Hee Lee
지도교수의 한글표기 : 이황수
지도교수의 영문표기 : Hwang-Soo Lee
학위논문 학위논문(석사) - 한국과학기술원 : 정보및통신공학과,
서지주기 참고문헌 : p. 54-56
주제 Speech perception.
Neural networks (Computer science)
Integrated circuits.
Signal processing --Digital techniques.
음성 인식. --과학기술용어시소러스
신경 회로망. --과학기술용어시소러스
집적회로. --과학기술용어시소러스
디지털 시스템. --과학기술용어시소러스
하드웨어 설계. --과학기술용어시소러스
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