An 8-bit 2-stage A/D converter is designed with a new architecture. The converter includes wide-band track-and-hold amplifiers which have 2 integrators in parallel. The track-and-hold amplifier samples input signals twice per clock cycle and the conversion speed of the A/D converter is two times faster than that of conventional A/D converter employing pipelined method. The converter is designed using current mode and it operates at the power supply voltage of 3.3V with the input dynamic range of 0-256㎂.
HSPICE simulation results show very high conversion speed of up to 55M samples/s and power consumption of 200mW With the model parameters of ISRC 1.5 ㎛ BICMOS process. The chip area is 12 ㎟.
