In this study, we present the new algorithm based on the resistance measurement technique to extract both the effective channel length and the parasitic source and drain resistances for nMOSFET's and the physical understanding of the gate- and substrate - source voltage dependence of the effective channel length and the parasitic source and drain resistances. Accurate determination and understanding of the effective cannel length and parasitic source and drain resistances will be essential to process development, device modeling, and fabrication monitoring for advanced integrated-circuit technology.
And we developed the parameter extraction method and some models for MOSFET's parameters. These all parameters have their own physical meaning and are related to process parameters. Therefore these parameters have nonphysical value and are consistent. In this paper, specially we propose some parameter's model which have substrate-bias and temperature dependent characteristics.
Final calculated results agree with the measured data very well. And this means that our parameters extracted are very exact. Specially because we propose the gate-bias dependent parasitic S/D resistance extraction and model, we can apply AIM SPICE models to LDD (Lightly Drain Doped structure). And because we propose the length, substrate-bias and temperature dependence of some parameters, we can apply AIM SPICE models to the devices under low temperature and substrate-bias condition.
