A simple fabrication process called KBiNMOS with polysilicon emitter structure is developed for common collector BiNMOS digital circuit. This structure has good switching characteristics at scaled supply voltage. The simple process allows us to give higher yield, higher packing density, smaller device number, smaller device size and higher performance than conventional BiCOMS technology. Unit devices of KBiNMOS technology which are composed of bipolar transistor, NMOS transistor, PMOS transistor, are fabricated and analyzed.
For bipolar transistor, current gain is 100 at 1mA, early voltage is 39.8V, $BV_{CEO}$=8.4V. And threshold voltage is 0.62V for NMOS, -2.0V for PMOS. Although there are some non-ideal characteristics observed due to the limited facility at KAIST, our new process can give a large impact to high performance digital VLSI.
