This thesis proposes a new space vector PWM strategy for 3-level inverter to improve the performance of recently suggested PWM methods. The proposed PWM method determines sequence of optimal space vector considering minimum switching frequency and charge balancing of source capacitors at every sampling instants. The output voltage harmonics are minimized over full voltage and frequency ranges, and the subharmonics caused by unbalance of input voltages, which is frequently generated at low output frequency, are completely rejected. The proposed PWM algorithm is quite simple enough to implement with micro processor or DSP.
Proposed algorithm is described in detail and the performance of it is examined by harmonic analysis. The algorithm is implemented with Intel-80286 and tested with 7.5KVA transistor 3-level inverter.
