Memory devices are classified into non-volatile memories and volatile momories. The former are not erasable by power off and the latter are erasable. Among non-volatile memories, semiconductor ROM's are classified into EPROM which is electrically programmable only and EAROM which is both electrically programmable and erasable. Since the conventional EAROM has short programming-erasing endurance, its properties may be changed after $10^3~10^4$ of programming -erasing cycle and needs programming-erasing time of 1~10 msec. The conventional EAROM devices are not used commonly yet due to the above reasion.
In this research, the inverted floating gate EAROM was designed and fabricated. This device has the structure of inverted floating gate to the control gate as compared with that of the conventional device. The floating gate is located above the control gate, and the control gate is located below the floating gate and above the channel. This structure improves operational stability since it suppresses inter-polysilicon oxide current at programming and prohibits channel leakage current at erasing.
As a result, the inverted floating gate device exhibits good programming/erasing characteristics and endurance with threshold voltage shift less than 0.3V after $10^6$ programming-erasing cycles. Also it shows higher operational voltage margins and wider programming-erasing windows than the conventional one under practical operating conditions.
Moreover, this strucrure has capability of god capacitor coupling ratio of the control gate as compared to conventional type. Therefore it can lead to lower operation voltage or reduced programming/erasing time.
