A model for BICMOS buffer switching operation is presented, including the influence of bipolar base transit time and collector-base capacitances. A closed-form solution for the propagation delay-time is obtained assuming low level injection and channel velocity limitation. For the high level injection case, the delay times are numerically obtained. These results are compared with those by HSPICE simulation, which shows good agreement. It is noted that the collector-base capacitance strongly affects the delay-time.
The scale-down effects are also investigated based on proposed model. The effects of supply voltage scale-down, only horizontal scale-down and both of horizontal and vertical scale-down are investigated individually. The results show that if we want to maintain or even improve the performance of BICMOS buffer in spite of scale-down, we should scale-down the vertical part to cancel the degradation by the supply voltage and horizontal scale-down.
