서지주요정보
GaAs SDFL(schottky diod fet logic) NOR gate의 제작과 DC, AC 성능측정 = Fabrication and DC, AC performance measurement of GaAs SDFL(schottky diod FET logic) NOR gate
서명 / 저자 GaAs SDFL(schottky diod fet logic) NOR gate의 제작과 DC, AC 성능측정 = Fabrication and DC, AC performance measurement of GaAs SDFL(schottky diod FET logic) NOR gate / 배종대.
발행사항 [대전 : 한국과학기술원, 1992].
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등록번호

8003070

소장위치/청구기호

학술문화관(문화관) 보존서고

MEE 92034

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초록정보

A GaAs SDFL three input NOR gate was fabricated using mesa etching isolation and recess etching method. It consists of three MESFET's of which gate length are all 2.5㎛ and width are 50㎛, 35㎛ and 15㎛ respectively and three schottky diodes of which area are 100㎛*10㎛ respectively. DC transfer characteristics of the fabricated SDFL inverter showed very high noise margin at moderate power consumption. With supply voltage of VDD=5V and VSS=-3V the noise margin is 2.25V for both high and low. AC performance measurement was carried under the condition that microprobe was directly contacted to the wafer pad. Then each pad was connected to VDD, VSS and ground port of HP 4145B, oscilloscope and pulse generator through coaxial lines. With 100kHz input pulse, good output pulse was observed but, with 1MHz input pulse, distorted output pulse was obtained. Through measurement of delay due to microprobe and coaxial lines and SPICE simulation, the fact that all delays contained in output pulse was resulted from measurement system was confirmed.

서지기타정보

서지기타정보
청구기호 {MEE 92034
형태사항 [ii], 53 p. : 삽화 ; 26 cm
언어 한국어
일반주기 부록 : PSPICE diode, MESFET model, SPICE program
저자명의 영문표기 : Jong-Dae Bae
지도교수의 한글표기 : 권영세
지도교수의 영문표기 : Young-Se Kwon
학위논문 학위논문(석사) - 한국과학기술원 : 전기및전자공학과,
서지주기 참고문헌 : p. 51-53
주제 Field-effect transistors.
Gallium arsenide semiconductors.
Logic devices.
쇼트기 장벽 다이오드. --과학기술용어시소러스
FET. --과학기술용어시소러스
비소화갈륨. --과학기술용어시소러스
NOR 회로. --과학기술용어시소러스
성능 분석. --과학기술용어시소러스
Diodes, Schottky-barrier.
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