Recent interest in the 60GHz band for high-density, short-range wire links had led to significant progress in the development of integrated circuits for low-cost mm-wave radio systems. Furthermore, as CMOS technology is scaled into the nanometer range, the DC characteristics in the saturation region become linear while the transconductance, minimum noise figure(NFmin), ft, and fmax improve.
This thesis describes the designed 60GHz even-harmonic mixer and low-noise amplifier. The designed even-harmonic mixer employs a current reuse circuit in the RF stage to improve its linearity, and uses the frequency-doubling technique in the LO stage to overcome the leakage and dc offset problems for direct conversion receiver. The designed even-harmonic mixer use TSMC 0.13um CMOS process and total chip size included passive/active balun is $1.1mm \times 1.1mm$. For measurement, the designed even-harmonic mixer possesses peak conversion gain 8.3dB, 1dB compression point(P1dB) of -15dBm, 3 dB bandwidth of 48.5~52.5GHz(4GHz) and 2LO-to-RF and LO-to-RF isolation of more than 40dB under the supply voltage of 0.9 V and LO power of 0dBm. The power consumption of the designed mixer core is about 1.8mW at an IF frequency of 90MHz.
The 60GHz low-noise amplifier is designed by 3-stage cascode structure to reduce Miller capacitance and to increase S12 isolation. The simulated NFmin of n-channel MOSFETs has the relationship the current density at different MOSFET size. The noise figure minimum of LNA is minimized when current density is 0.1~0.14mA/um. The simulated LNA possesses peak gain of 15.3dB, noise figure of 7.6dB and P1dB of -14.2dBm. The power consumption of the simulated LNA is about 8.7mW under the supply voltage of 0.9 V.
