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High-performance CMOS-based variable-gain amplifier design techniques
서명 / 저자 High-performance CMOS-based variable-gain amplifier design techniques / Duong Quoc Hoang.
발행사항 [대전 : 한국정보통신대학교, 2007].
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DM0000887

소장위치/청구기호

학술문화관(문화관) 보존서고

ICU/DS07-11 2007

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Variable gain amplifier (VGA) is an important block in wireless communications systems, hearing aids, disk drivers, medical equipments, and others [1-16]. This paper describes design techniques for high-performance CMOS-based VGAs which feature wide decibel-linear gain range, wide bandwidth, low-power, low-voltage, temperature/process independent, supply insensitive, and small chip size characteristics. Many techniques for obtaining wide decibel-linear gain range are introduced; some of which are based on approximated exponential equations while the other utilizes a new V-to-I converter with distortion in the V-I relation caused by the supply voltage reduction. The temperature-independent gain is obtained by a bias circuit with negative-temperature coefficient and by a proper combination of the V-to-I converter with a differential amplifier. The supply-insensitive characteristic is achieved by new VGA topologies. Based on the proposed design techniques, the high-performance CMOS-based VGAs can be designed for uses in many different applications. In this paper, many VGAs are designed for uses in applications like Zigbee, WLAN, code-division multiple access (CDMA), Bluetooth, and ultrawideband (UWB) transceivers. One of the VGA for Zigbee applications is fabricated in 0.18$\mum$CMOS technology and measurements show 92dB of gain variation over a control voltage of -0.5 to 0.5V. The gain deviation over a temperature range of 0 to 80$\deg$C is $\plusmn$3dB. The max/min input P1dB and IP3 is -8/- 50 and -14/-56dBm, respectively. The 3dB bandwidth is greater than 17MHz and the chip occupies 250$\times$520$\mum^{2}$ while consuming 1.32mW from 1.2V supply. One VGA for UWB applications is fabricated in 0.13$\mum$ CMOS technology and measurements show 82dB (-30 ~ 52dB) of the gain variation, 3-dB bandwidth of 320MHz at a maximum gain of 52dB, P1 dB from -67 to 0dBm, the active area of chip of 450$\times$675$\mum^{2}$, and the bias current of 11mA from 1.5V supply.

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서지기타정보
청구기호 {ICU/DS07-11 2007
형태사항 x, 103 p. : 삽화 ; 26 cm
언어 영어
일반주기 지도교수의 영문표기 : Sang-Gug Lee
지도교수의 한글표기 : 이상국
학위논문 학위논문(박사) - 한국정보통신대학교 : 공학부,
서지주기 References : p. 95-97
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