In the modern opto-electronic transceiver designs, the high-speed frontend circuits of the optical receivers are considerably focused on the circuit designs. Many different topologies have been published since the optical fiber was applied for transmitting high data rate signal. In the optical transceivers, the transimpedance amplifier (TIA) plays a critical role in converting the input current into output voltage and amplifying it.
In order to get the high performance of the optical transceivers, the feedback TIA is critically required in the high-speed front-end circuit. The feedback TIA has a low noise, high gain in compared to other topologies such as open-loop TIA, fold-cascode TIA. However, there are some tradeoffs between the gain, bandwidth and linearity performance whenever the designers desire a really perfect TIA: low noise, high gain, high bandwidth and high linearity. This thesis emphasizes to extricate some trade-offs in the feedback TIA, a typical topology transimpedance amplifier.
In the feedback TIA, the feedback resistor is placed to connect the input stage and output stage. It makes possible to avoid the noise of load and transistor of the main state of the core amplifier referring to the input. This advantage expresses the low noise performance of the feedback TIA. Furthermore, the transimpedance gain of the feedback TIA is approximately equal to the feedback resistor. The higher value the feedback transistor, the higher the transimpedance gain. However, in the large input signal condition, the high gain performance reduces the linearity of the feedback TIA due to the output voltage falls down. In the convention designs, the linearity degradation of the feedback TIA is solved by automatic gain control (AGC) function. However, using the AGC function can increase the chip size as well as the circuit complexity. Moreover, the noise from AGC circuit can refer directly to the input through the feedback resistor. In this thesis, the new idea improving the linearity of the feedback TIA without using the AGC function as well as scarifying its gain, noise performance. The simulation results have confirmed the efficient linearity performance of the new TIA topology.
Other issue emerges when designing a TIA. Normally, the TIA requires the bandwidth over 70% of the data rate. For the low data rate transceivers, the conventional TIA can provide enough bandwidth. For the high data rate transceivers, the TIA needs a technique to extend its bandwidth. One of the techniques is called inductive peaking that uses a peaking inductor in the load of the core amplifier. This technique allows to extent 80% of the bandwidth. In order to satisfy the high gain, high bandwidth, high linearity performances, it is benefit to combine the AGC function and inductive peaking in the feedback TIA. The experimental combined feedback TIA is conducted to express the high performance TIA. The TIA design with 69dB gain, 7.2 $It\{pA / \sqrt{Hz}}$ , good eye diagram is a simulation results carried on 0.18um CMOS technology.
