Embedded systems market is rapidly growing due to the increasing need for product personalization, rapid growth of non-computing domains such as medical instrumentation and imaging, information appliances. An Application specific instruction-set processor (ASIP) can be a significant component of such embedded systems, since the processor customization to target applications yields lower area, power and cost. However, an embedded system employing an ASIP may result in delayed time to market. It results from the higher HW/SW development overhead in designing an instruction set and special hardware modules, in developing a compiler, a debugger, and so on. Therefore, a framework for rapid development of ASIP is crucial for embedded systems.
A recent innovation addressing this problem is an embedded soft core, a configurable processor which has parameterizable components. Although these processors can be considered to be flexible compared to the fixed one, they still do not seem to provide much freedom to the designer in choosing architectural alternatives. A more flexible approach to these would be an ASIP platform based on Architecture Description Language. With an ADL-based approach, one can freely form a design space wherein an instruction set, an addressing mode, a pipeline structure with special functional units extracted from target application analysis, to mention a few, can be configured to evaluate performance metrics. This thesis follows an ADL-based approach by defining an architecture description language that directly supports a design space exploration. The design space specified by this language is internally managed by a data structure with formal semantics. To reduce the S/W development overhead caused by architectural changes during the exploration, a package of associated retargetable simulator, compiler and linker has also been developed.
As the most essential part of this thesis, a parametric design space exploration algorithm is proposed which exploits parameters sensitivity and their inter-dependency to quickly provide a global optimum, near-optimal or constraints-satisfying configuration depending on the type of design objectives. This methodology has been designed to be general enough to be integrated with any other platforms, only if the design space can be represented as a combination of architectural parameters. To show the effectiveness and range of applicability of the exploration scheme, we have integrated it with the proposed ASIP platform and Simplescalar simulator environment. Experimental results show that the exploration algorithm provided a large speedup against previous work without much sacrifice of accuracy.
본 논문은 Embedded 시스템의 주요 구성요소인 응용분야 전용 프로세서(ASIP)의 고속 설계를 위하여, 아키텍쳐 기술언어를 기반으로 한 유연한 high-level ASIP 플랫폼을 제안하고, 이러한 ASIP 플랫폼에 적합한 효율적인 설계 공간 탐색 방법론을 제시했다. 특히, 이러한 탐색 방법론은 ASIP 플랫폼뿐만 아니라 SOC나 ASIC 플랫폼에도 적용될 수 있도록 platform-independent하게 설계되었다. 또한, 아키텍쳐 개발자의 다양한 설계 목적에 맞게 여러 형태의 최적화 알고리즘을 구현/실험 하였다. 시스템의 global optimum configuration을 정확하면서도 효율적으로 찾을 수 있는 G-opt 알고리즘, near-optimal configuration을 G-opt보다 훨씬 더 큰 speedup을 가지고 찾을 수 있게 설계된 N-opt 알고리즘, 사용자가 입력으로 전달하는 디자인 파라미터간의 제약사항을 만족하면서 시스템의 최적화해를 찾도록 설계된 C-opt 알고리즘 등이 그 예가 되겠다. 위의 모든 알고리즘은 기본적으로 시스템의 설계 대안을 나타내는 디자인 파라미터간의 의존성을 기반으로 연구되었다. Previous work이 단순히 파라미터의 의존성에만 의해서 speedup을 얻은 반면, 본 연구는 이에 추가하여 효율적인 탐색 공간 pruning 방법, dependency softening에 의한 approximation 기법, 시스템 sensitivity에 따른 파라미터의 bi-partitioning등의 핵심적인 기법들을 제안하여 성능/정확성/적용범위의 면에서 적지 않은 개선을 이루었다. 제안된 방법의 효율성을 검증하기 위해서, research vehicle로서 많이 쓰이는 simplescalar architecture 및 본 연구에서 제안된 ASIP 플랫폼 환경에서 실험을 하였으며,공히 높은 speedup과 상당히 정확한 accuracy 결과를 보였다.
