A 2.4GHz radio chip for the low power and low rate IEEE 802.15.4 WPAN using 0.18㎛ CMOS technology consumes 6mA and 10mA at 1.8V supply in receiver and transmitter. The receiver adopts low-IF architecture with a poly-phase filter and transistor linearization technique. Low power ROM based DSSS GMSK signal is directly up-converted using I/Q mixing. Silicon area is 3.5mm×2.5mm and Chip-On-Board using PCB technology is used to implementation a coin size(3cm× 3cm) and low cost transceiver.