Metal-ferroelectric-insulator-semiconductor field effect transistor (MFISFET) would be a promising nonvolatile memory due to its non-destructive readout property and a good scaling-down rule. In general, an insulating buffer layer needs to be inserted between ferroelectrics and silicon in order to diminish interdiffusion and lattice mismatch between ferroelectrics and silicon. Furthermore, because the dielectric constants of ferroelectric films are generally larger than those of insulator films, the voltage applied to the ferroelectric film becomes smaller than that applied to the insulator, which results in high operation voltage of the device. Therefore, it is desirable to use an insulator having larger dielectric constant and not interacting with silicon and ferroelectrics and various buffer layers have been proposed as an insulating layer to solve these problems. Besides, MFISFET is required to have long-term stability and reliability under various electrical stresses. The most important degradation mechanisms that hamper the realization of ferroelectric nonvolatile memories are imprint and retention.
In this study, Electrical properties of MFIS structures including $SrBi_2Ta_2O_9$ ferroelectric film by spin coating and insulating layers ($Al_2O_3$ and $Ta_2O_5$) by ALD were examined. The mechanisms of reliability problems and the solution for improving the electrical characteristics were studied also.
First, MFIS structures were fabricated on Si substrate based on their optimum thickness extracted from the computer simulation. As a result, we selected the MFIS structure with 240nm-thick SBT film and 10nm-thick $Al_2O_3$ film, which has the memory window width of 1.35V at 20 μA of the drain current.
From the capacitance-voltage (C-V) characteristics of a Pt/$Al_2O_3$(10nm)/p-Si structure, it is found that there is almost no hysteresis in the C-V curve, which indicates mobile ions and oxide trapped charges in the Pt/$Al_2O_3$/p-Si structure can be neglected. The leakage current of the Pt/$Al_2O_3$/p-Si structure was measured to be 7.5×10^{-9}/㎠ at 1V. These values are sufficiently low to apply to the insulating layer of the MFISFET structure. C-V characteristic of Pt/SBT(240nm)/ $Al_2O_3$ (10nm)/Si structures shows a large memory window width of 1.2V at the operation voltage of 5V and The gate leakage current density is found to be quite low, showing 7×10^{-8}A/㎠ at 1V, which is sufficiently low to apply to highly integrated ferroelectric nonvolatile memory.
With a high voltage operation, there is an electron trapping when $Al_2O_3$ insulating layer was used and a hole trapping when $Ta_2O_5$ insulating layer was used, respectively. The memory window width is almost not changed up to $10^11$ cycle of the fatigue stress, which is sufficient fatigue property for MFISFET to apply to highly integrated ferroelectric nonvolatile memory.
A large number of negative voltage stresses may cause the electron trapping at the electrode/ferroelectric interface. These trapped electrons combines with the polarized domain and pin it. The pinned domain remains polarized in a specific direction and causes a drop of the polarization switching of the opposite direction. It can be suggested that the electron trapping is responsible for the threshold voltage shift, i.e.; the electron trapping at the top electrode interface causes a positive shift. It was found that the retention characteristics were good up to $10^5$ second in the Pt/SBT/$Al_2O_3$/Si structure and retention property was dependent on the polarization value and leakage current characteristics.
Finally, we study the post-annealing effects on long-term reliability characteristics of the MFIS structure due to the imprint and retention. The threshold voltage shift drastically reduces against repeating the imprint stress up to $10^11$ cycles after the post-annealing, which is believed to reduce defects located in Pt/SBT interface and to diminish the electron trapping from the top electrode. Retention characteristics was also improved after post-annealing because of leakage current reduction
