서지주요정보
아키텍처 기술 언어를 통한 DSP를 위한 retargetable compiler의 구현 = Retargetable compiler for DSP using architecture description language
서명 / 저자 아키텍처 기술 언어를 통한 DSP를 위한 retargetable compiler의 구현 = Retargetable compiler for DSP using architecture description language / 오세종.
발행사항 [대전 : 한국과학기술원, 2002].
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8013038

소장위치/청구기호

학술문화관(문화관) 보존서고

MEE 02061

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Retargetable compiler allows the rapid set-up of a compiler to a newly degigned processor and permits architecture exploration in the embedded processor development. The most promising avenue for sup-porting the retargetability of compilers is the work on specification languages and models. In this paper, the user-retargetable compiler was implemented to make a architecture-specific compiler with a cheap over-head. To achieve the user-retargetable, an arhitecture description language called HiREAD is used to extract the information from a target processor and it has enough information to generate a pair of compiler and simulator automatically. Since the specialized embedded processors require different and complex code generation unlike general purpose processor's one, the code generator was designed to exploit complex instructions and addressing modes in embedded processor. To verify the retargetability, a commercial DSP was described and a compiler was successfully generated by the retargetable compiler. The code quality is also important, so the performance of a generated compiler was compared with an optimizaing compiler. Although numerous improvements are needed in the code generation, the result was hopeful to support embedded processors.

서지기타정보

서지기타정보
청구기호 {MEE 02061
형태사항 [v], 40 p. : 삽화 ; 26 cm
언어 한국어
일반주기 저자명의 영문표기 : Se-Jong Oh
지도교수의 한글표기 : 백윤흥
지도교수의 영문표기 : Yun-Heung Paek
학위논문 학위논문(석사) - 한국과학기술원 : 전기및전자공학전공,
서지주기 참고문헌 : p. 39-40
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