This thesis presents threes kinds of circuits for IMT-2000 handset on 2GHz Band. The first one is a conventional receiver, the second one is a receiver integrated with an image reject mixer, and the last one is a proposed quadrature generator to generate accurate quadrature signals for Hartley image reject architecture.
The conventional 2GHz fully monolithic 0.5um SiGe BiCMOS superheterodyne receiver front-end is presented; it consists of two gain controllable low noise amplifiers and a single balanced mixer integrated in one die. The two gain controllable low noise amplifiers provide 4 stepped gain modes.
The image reject receiver, consisting of a low noise amplifier and a Hartley image reject architecture, is also fully monolithic. The LO quadrature signals are generated by an injection locked frequency divider based on a 2 stage ring oscillator. And RC-CR networks are used for 90°. phase shifter. The simulation results show 54dB image rejection ratio.
The proposed quadrature generator, using PLL conception and a tunable phase shifter, consume only 3.5mA more for phase control feedback loop. The simulation results show 0.12 °. phase error at 2.3GHz. The expected image rejection ratio of the image reject mixer integrated with the quadrature generator is 60dB.
