Temperature effects and stability of high performance polysilicon thin-film transistors (poly-Si TFTs) with electron cyclotron resonance (ECR) $N_2O$-plasma gate oxide by both low- (LT) and high-temperature (HT) processes were investigated. The fabricated HT n-channel poly-Si TFT exhibits negative output conductance and decrease of drain current with increasing drain voltage at higher gate bias. This is found to be due to the high temperature rise during device operation caused by poor thermal conductivity of thick insulating substrate. The temperature in the channel region during operation is estimated by measuring the temperature dependence of resistance of the gate poly-Si. The temperature effects significantly enhance the degradation of threshold voltage under electrical stresses. The temperature rise is closely related with applied power, which is defined as a product of drain current and stress drain voltage. Although the mechanism of the threshold voltage shift is the breaking of the Si-H bond due to high temperature rise up to 480℃ , the fabricated n-channel poly-Si TFT exhibits very small degradation, which is attributed to the thermally stable Si-N and Si-O bonds. The fabricated TFT is expected to have lifetime of more than 10 years when the applied power is lower than 1.4 mWatt/㎛. On the other hand, instabilities of both HT and LT p-channel poly-Si TFT are found to be hot-carrier effects rather than temperature effects. Although stability of LT TFT is inferior to that of HT TFT, LT poly-Si TFT exhibits good device performance comparable to those of HT poly-Si TFT.
