In this thesis, we propose an efficient digital matched filter bank with less hardware complexity for hybrid code acquisition in CDMA systems. The hardware complexity of the digital matched filter bank is reduced by common sub-expression (CSE) extraction. By applying the template matching algorithm used in complexity reduction of FIR filter with CSD(canonical signed digit) code coefficients, we reduce the number of required adders dramatically. And we introduce a less exhaustive and more efficient CSE extraction algorithm - column pattern matching algorithm. The efficiency of the proposed algorithm is verified for the case of the matched filter bank with IS-95 short PN code coefficients.
And we propose a fast single matched filter structure by applying the proposed column pattern matching algorithm. The proposed structure enables the matched filter to operate in faster input sample rate with the same hardware complexity and power consumption, and for the same input sample rate, less power is consumed.
