서지주요정보
고성능 연산 증폭기의 설계 자동화 = Design automation of high-performance operational amplifiers
서명 / 저자 고성능 연산 증폭기의 설계 자동화 = Design automation of high-performance operational amplifiers / 유상대.
발행사항 [대전 : 한국과학기술원, 1998].
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등록번호

8008400

소장위치/청구기호

학술문화관(문화관) 보존서고

DEE 98008

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초록정보

Based on a new search strategy using circuit simulation and simulated annealing with local search, a design tool is proposed to automate design or tuning process for CMOS operational amplifiers. A special-purpose circuit simulator and some heuristics are used for accomplishing design within reasonable time. For arbitrary circuit topology and specifications, the discrete optimization of cost function is performed through global and local search. The specifications of operational amplifiers for high-speed pipelined A/D converters is analyzed, and a low-power high-speed fully differential CMOS operational amplifier is designed using this tool. It exhibits a dc gain of 74dB, a unity-gain frequency of 200MHz, and a power dissipation of 11mW at ±2.5 V supply voltages and 1pF load. And applying to the S/H/Gain amplifier with a capacitive load of 0.5pF, the 0.1% settling time of 15 ns for output voltage swing of ±1 V satisfied the design specifications. Through the comparision of design results and the design of a low-power high-speed fully differential CMOS operational amplifier usable in 10-bit 25-MHz pipelined A/D converters, it was demonstrated that this tool can be used for designing high-performance operational amplifiers with less design knowledge and less design effort.

서지기타정보

서지기타정보
청구기호 {DEE 98008
형태사항 vi, 108 p. : 삽화 ; 26 cm
언어 한국어
일반주기 저자명의 영문표기 : Sang-Dae Yu
지도교수의 한글표기 : 경종민
지도교수의 영문표기 : Chong-Min Kyung
수록잡지명 : "SAPICE: A Design Tool of CMOS Operational Amplifiers". IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. The Institute of Electronics, Information and Communication Engineers, vol. E80-A, no. 9, pp. 1667-1675 (1997)
학위논문 학위논문(박사) - 한국과학기술원 : 전기및전자공학과,
서지주기 참고문헌 : p. 99-108
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