The major objective of this study is to find a way to improve the time to market performance in a development project for memory semiconductor. We focus our attention on the initial ramp-up phase at mass production line, which have not been properly investigated both in literature and practice.
We analyzed 19 development projects for memory chips selected from a Korean semiconductor company. First, we identified the patterns of semiconductor yield improvement. Second, we analyzed the correlation between the improvement performances and their affecting variables. Third, we carried out several in-depth case studies to identify the more complex relationships among the variables.
Major findings are as follows:
1) Yield improvement patterns are grouped into three types, and these seemed to be related to the stage in the product life cycle of each product.
2) Correlation analysis suggests that key factors such as the newness of design technology and the market size of the product are most influential to successful yield improvement.
3) In-depth case analyses implicate that there are more dynamic relationships among factors working on each project.
