Porous silicon was discovered in 1950's by Tuner and Uhlir during the electro polishing silicon wafer in HF solution. Although porous silicon can find its possibility of application in diverse area, it has not been used commercially since the pore formation mechanism and the properties of porous silicon are not completely understood and the process technology is not mature. The possible applications of porous silicon are capacitor in DRAM to increase the capacitance for highly integrated DRAM, photo-device semiconductor formation, measuring device in semiconductor and so on. For these application, there are two issues. First is the development of new process to fabricate the porous silicon layer which has suitable structure for such applications. Second is the optimization of process condition in such processes. To solve these problems, it is necessary to investigate mechanism of pore formation and find process variables which control pore depth and distribution. In this study, effects of the major variables that affect the pore formations, reaction characteristics in surfaces, distributions of current and electric potential in boundary of solution have been studied to control the size and distribution of pores in porous silicon layer.
We investigated pore depth and size which are dependent on the concentration of ethanol, reaction time and current density by Scanning Electron Microscopy. Generally, the pore depth are proportional to these variables, but in our study we found the maximum point of growth at the concentration of 0.1 volume percent of ethanol and saturation point of growth at 10 min in the case of p-type. This is because of difficulty of penetration of solution into the small pore, which is typical for p-type silicon. Based on these results we verify the two steps of pore formation, that are the initial attack on the surface of silicon and development of pores. In this study we enforced the first step by wet etching on PR patterned surface and induced the selective growth of pore. Finally we investgated the relationship between the number of pores in surface and stresss or impurity and found that these variables also have a part in determining the locations of pores with the same mechanism.
The results of this study can be used as information about pore formation and growth. We expect that our study can help further study of the exact pore formation mechanism and development of process for a new semiconductor device.