서지주요정보
다결정 실리콘 박막 트랜지스터에서의 바이어스에 의한 결함 생성에 관한 연구 = Bias stress induced defects in polycrystalline silicon thin film transistor
서명 / 저자 다결정 실리콘 박막 트랜지스터에서의 바이어스에 의한 결함 생성에 관한 연구 = Bias stress induced defects in polycrystalline silicon thin film transistor / 김서윤.
저자명 김서윤 ; Kim, Seo-Yoon
발행사항 [대전 : 한국과학기술원, 1996].
Online Access 원문보기 원문인쇄

소장정보

등록번호

8006857

소장위치/청구기호

학술문화관(문화관) 보존서고

DPH 96018

SMS전송

도서상태

이용가능

대출가능

반납예정일

초록정보

We have fabricated the polycrystalline silicon thin film transistors (poly-Si TFT's) by solid state crystallization(SPC) of amorphous films deposited by low pressure chemical vapor deposition(LPCVD). The effects of hydrogenation on the output characteristics and leakage current of the poly-Si TFT's have been studied. By using two different precursor films, one is from silane and the other is from disilane, we got the dependency on the grain size of the poly-Si films. Because hydrogenation cannot passivate all the defects in the grain boundary, it is important to get the films of large grain size. We have bias-stressed hydrogen passivated polycrystalline silicon thin-film transistors varying the bias condition and measured the change in the field-effect conductance activation energy as a result of the bias stress. For stress by a high gate bias voltage, a slight broadening occurs in the activation energy curve, while stress by a low gate bias voltage gives rise to a shoulder at low gate voltage, which could be explained by the defect states localized at the region near drain. Numerical calculation has conformed that the change in activation energy is due to defect generation in poly-Si and if stressed by low gate voltage, defects are localized at near the drain region. The energy distribution of the defects cannot be obtained accurately, but its energy position is higher than 0.2 eV above mid-gap.

서지기타정보

서지기타정보
청구기호 {DPH 96018
형태사항 vii, 92 p. : 삽도 ; 26 cm
언어 한국어
일반주기 저자명의 영문표기 : Seo-Yoon Kim
지도교수의 한글표기 : 신성철
공동교수의 한글표기 : 이주천
지도교수의 영문표기 : Sung-Chul Shin
공동교수의 영문표기 : Choo-Choon Lee
학위논문 학위논문(박사) - 한국과학기술원 : 물리학과,
서지주기 참고문헌 : p. 90-92
주제 다결정 실리콘
박막 트랜지스터
모델링
활성화 에너지
Poly-Si
Thin film transistor
Simulation
Grain boundary
Activation energy
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