There are many technical approaches in the area of High-speed communication. Especially, a new standard (ANSI/IEEE 802.3) has been proposed for the 100Base-T4. The speed of 100Base-T4 is superior to the one of the 10Base-T by ten times. In this thesis, therefore, a novel line dirver and an automatic gain controller (AGC) for the 100Base-T4 transceiver are designed, respectively. The line driver consists of a wide GBW preamplifier and an output buffer contaning a novel quiescent current control circuit. It provides 800MHz GBW and 3.5V output swing for 100 ohm load with a low quiescent power consumption. And the AGC has VGA, peak detector, and difference amplifier. It provides 60MHz bandwidth and 20dB dynamic range. The above circuits are simulated by using HSPICE BSIM 28 model for 0.6u CMOS technology.
