Millimeter-wave and Terahertz frequency systems are increasingly attracting the attention for various industry. These systems are expected to use for many application including imaging system, bio and molecular spectroscopy, detection of concealed object and short range communication. Recently, these systems are implemented using CMOS process due to the advantage of integration. Then, the amplifier design is also recent issue due to the lack of system output power. But, design of millimeter-wave amplifier has some issues. Therefore this thesis summarize the design issues of millimeter-wave amplifier. First, link budget of sub-THz transmitter and receiver system was calculated by using the concept of minimum SNR. And the power gain definition including Maximum Available Gain ($G_{ma}$), Unilateral Gain (U), and Maximum Achievable Gain ($G_{max}$), is introduced. Then, 200 GHz common gate amplifier with Maximum Achievable Gain is implemented by 2-stage common gate topology in 65nm CMOS process. Common gate topology is used to implement maximum achievable gain amplifier for the first time. Common Gate topology has higher gain near maximum oscillation frequency. This chip designed in 65nm CMOS process with a chip area of 0.7x0.65 $mm^2$
Finally, 200 GHz Cascode amplifier is implemented by 2-stage cascode topology in 65nm CMOS. Cascode topology has higher gain than 2-stage common gate topology and has higher MAG pole than common source topology.
본 논문에서는 CMOS 공정을 이용한 millimeter-wave and sub-THz대역에서의 Amplifier 설계에 대하여 다루었다. 비록 millimeter-wave 그리고 sub-THz 대역에서 CMOS로 amplifier를 구현하는데 있어서 한계와 문제점들이 존재하지만 그러한 한계와 문제점들을 해결하기 위해 중요한 부분들에 중점을 두고 그 부분을 해결할 수 있는 방향으로 설계를 진행함으로써 문제점들을 보완하였다. 그리고 기존 previous works에서 사용되었던 구조가 아닌 common gate구조와 cascode구조를 이용하여 maximum achievable gain을 갖는 CMOS amplifier를 새롭게 구현하였다. 그리고 4장에서 소개한 cascode구조를 이용하여 설계한 증폭기는 47mW의 전력소모로 19.6 dB의 gain을 얻었다. 이 증폭기는 maximum achievable gain을 이전 works에서 common source 구조로 구현되었던 것과는 달리 새롭게 common gate구조와 cascode 구조를 이용하여 구현하였다는 특징이 있다.