The effects of the deposition variable and annealing condition on the structure and electrical properties were investigated for about 17nm thick tantalum oxide film deposited on silicon by ECR-PECVD.
The composition and structure of $Ta_2O_5$ films were analyzed by AES, XRD and cross-sectional TEM. $Al/Ta_2O_5/SiO_2/p-Si$ capacitor formed by photolithography is used for I-V and C-V measurements.
The thicknesses of the $SiO_2$ at the interface of $Ta_2O_5$/Si$ was ranged between from 2.5 to 3.5nm except for the sample annealed at above 850℃.
The deposition rate decreased and then the interfacial $SiO_2$ decreased as deposition temperature and microwave power increased, but decreased as oxygen flow rate. Therefore, the effective dielectric constants of $Ta_2O_5/SiO_2$ films decreased with increasing deposition temperature and microwave power, but increase with increasing oxygen flow rate. The electric breakdown field increase with increasing deposition temperature, microwave and oxygen flow rate.
The as-deposited armorphous $Ta_2O_5$ films annealed at above 750℃, for 30min in $O_2$ and $N_2$ atmosphere were crystallized to be $\delta-Ta_2O_5$. The optimum annealing conditions for the leakage current property and dielectric constant were 700℃ in $O_2$ atmosphere and 750℃ in $N_2$ atmosphere, respectively.
The flat-band voltages for the 5∼10Ω p-type(100) Si substrate ranged from between -0.4 and -1.6V. Flat-band voltages corresponding to C-V curves of the $Al/Ta_2O_5/SiO_2/p-Si$ capacitors were more positive than those of $t_{ox}$ equivalent $SiO_2$ capacitors. Therefore, negative charges are incorporated in tantalum oxide during C-V sweeping. The effective dielectric constant of $Ta_2O_5/SiO_2$ film decreased as its thickness decreased due to increase of interfacial $SiO_2$ layer thickness.
