A complex digital video processing has to be made in the HD-MAC encoder. The techniques involved, such as spatio-temporal filtering and motion estimation are highly computing intensive. Consequently, digital signal processor (DSP) boards are required to efficiently simulate the so-called HD-MAC bandwidth reduction algorithm. So this thesis describes an effective software techniques to implement the HD-MAC encoder and decoder by using a simulator board. After presenting a review of the HD-MAC system a software implementation of the HD-MAC system is investigated. The simulator board can operate at 50 million instructions per second (MIPS). It takes 4 minutes to encode a 336×336 luminance image and 2 minutes to decode it.
