A new annealing method, a combination of rapid thermal annealing(RTA) and furnace annealing, was developed to obtain high-quality polycrystalline silicon(poly-Si) film and to reduce the long annealing time for solid-phase crystallization(SPC) of amorphous silicon(a-Si) film without a decrease in grain size. Amorphous Si films of 50 nm thickness were deposited on thermally oxidized 5-inch Si wafer by low pressure chemical vapor deposition(LPCVD) using $SiH_4$. These films were annealed at 750℃ for a short time ($10\sim60\sec$) by RTA apparatus for nucleation and then annealed at 590℃ for 20 hr in a furnace for grain growth. The structural properties of poly-Si films were analyzed by Raman scattering, X-ray diffraction (XRD), and transmission electron microscope(TEM). For the poly-Si film annealed at 750℃ for 20 sec by RTA, the full width at half maximum(FWHM) of the measured Raman spectrum showed the minimal value. It was observed that the nuclei generated by RTA grow immediately during the furnace annealing without incubation time. The grain size of the poly-Sim film obtained by RTA (750℃. 20 sec) plus furnace annealing (590℃, 20 hr) was around 200 nm, and its structure was dendritic. The grain size and structure of this film were similar to those of the poly-Si film prepared only by furnace annealing (590℃, 20 hr). Therefore, the crystallization time can be reduced without a decrease in grain size using the new annealing method developed.
In order to verify the electrical properties of poly-Si film prepared by the new annealing method, n-channel poly-Si film transistors(TFTs) were fabricated through low temperature (＜600℃)process. The fully hydrogenated poly-Si TFT prepared by RTA (750℃, $20\sec$)plus furnace annealing (590℃, 20 hr)had good device characteristics such as a field effect mobility of 25㎠ / V.$\sec$, a threshold voltage of 2.1 V, a subthreshold slope of 403 mV / dec., and a leakage current of $10^{-12}-10^{-11}A(V_D=5V)$. The uniformity of field-effect mobility was measured in 5-inch wafer. The poly-Si TFTs prepared by RTA (750℃, $20\sec$) plus furnace annealing (590℃, 20 hr) had better uniformity (±5% in 5-inch wafer) than those prepared only by furnace annealing (590℃, 20 hr).
The effect of hydrogen passivation was also observed. Hydrogen was performed by using electron cyclotron resonance(ECR)-plasma. The electrical properties of poly-Si TFTs were improved by hydrogen passivation but kink current was increased. Kink current depended on the grain boundary trap state density.
The newly developed method, the combination of RTA and furnace annealing, can yield high quality poly-Si film and reduce the annealing time for crystallization of a-Si film without a decrease in grain size.
