Most of the commercially available MODEMs for voice band data communication using telephone lines are implemented by combining analog front-ends and digital signal processing parts. The analog front-ends include band-pass filters, an automatic gain control (AGC) unit, an analog-to-digital (A/D) converter with variable sampling time, and a digital-to-analog(D/A) converter. Even though it is much more convenient and preferrable to implement the functions of the analog front-ends digitally, the major bottleneck is its increased computational complexity in the digital domain. However, with the rapid increase in performance of digital signal processing (DSP) chips, now it is feasible to implement all of the MODEM building blocks digitally using the off-the-shelf DSP chips.
In this thesis work, an all-digital quadrature amplitude modulation (QAM) receiver algorithm is implemented for the voice-band data transmission. The MODEM algorithm implemented includes functional blocks of band-pass filtering, symbol timing recovery, phase splitting, carrier tracking and decision, adaptive equalization, interpolation, and training sequence detection and synchronization.
This QAM receiver algorithm is implemented specifically for CCITT V.29 MODEM signal. As for the specific functional blocks to be noted in this study, we choose the passband symbol timing recovery for tracking symbol timing, the fractionally spaced equalizer structure and LMS algorithm for compensating channel distortion, and the training sequence detector for detecting the V.29 synchronization signal. The implemented MODEM receiver algorithm is tested and verified by detecting the actual modulated signal obtained from the V.29 MODEM transmitter. Futher study should be needed to obtain the performance of the implemented algorithm for telephone channels with noise and distortion.
CCITT 권고안중 V.29는 전화선 형태의 전용선에 접속하는 9600 bps의 고속 data MODEM이다. 본 연구에서는 CCITT Rec. V.29 수신기를 analog 부분을 제어하지 않는 all-digital 형식으로 구현하였다.
Symbol timing 복구회로는 계산이 간단하며 delay의 보상이 쉬운 pass band type을 사용하였다. Adaptive equalizer는 symbol timing phase에 둔감한 구조인 T/2 FSE을 사용하였고 decision error을 이용하여 carrier phase을 추적하였다. 또한 V.29에서 규정한 Synchronization signal을 training하기 위하여 training sequence detector와 synchronization signal에 대한 training 알고리즘을 개발하였다. 구현된 알고리즘은 AD 샘플된 데이타에 대하여 잘 동작한다. 그러므로 본 수신기 알고리즘은 MODEM의 수신기를 위한 특별한 hardware의 설계없이 DSP에 쉽게 적용시킬 수 있다.