서지주요정보
파고다 커널을 위한 가상 기억장치 관리 메커니즘 = A virtual memeory management mechanism for pagoda kernel
서명 / 저자 파고다 커널을 위한 가상 기억장치 관리 메커니즘 = A virtual memeory management mechanism for pagoda kernel / 박재현.
발행사항 [대전 : 한국과학기술원, 1991
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8002164

소장위치/청구기호

학술문화관(문화관) 보존서고

MCS 9117

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초록정보

This thesis describes a virtual memory management mechanism for large scale MIMD multiprocessor systems with proper performance. In the next decade, the prices of the computer will drop so low that 10, 20, or perhaps 100 powerful microprocessors per user will be feasible. Although there have been many virtual memory management systems since the Atlas system, they are not appropriate to such multiprocessor systems. In this thesis, we describe the design and implementation of a virtual memory management mechanism for No Remote Memory Access architecture system that has several hundreds nodes. We discuss the issues to provide user with the virtual memory space on that system, design a virtual memory management mechanism which will be a solution of those issues, and implement a prototype on the basis of that design. We propose the virtual swap server for swapping services with proper bandwidth in that scale multiprocessor system. And we exploit the trading system for naming services of that paging manager - for dynamic binding between paging manager(eg, loader server, virtual swap server, and static swap server) and processes that use swapping services for paging activities. The virtual swap server is made with idle remote memory that exists in remote node in the NoRMA system, provides and withdraws swapping services to all system through trading services. From the simulation of performance model, we found that the virtual swap server is useful for proper performance of virtual memory and the trading services help the virtual memory management system to be scalable; the trading doesn't affect the scalability of the system, and the utilization of the interconnection network can be managed by trader. As the results, we provide a virtual memory management mechanism with proper performance for the NoRMA architecture system that has several hundreds nodes.

서지기타정보

서지기타정보
청구기호 {MCS 9117
형태사항 [iii], 95 p. : 삽화 ; 26 cm
언어 한국어
일반주기 부록 수록
저자명의 영문표기 : Jae-Hyun Park
지도교수의 한글표기 : 전길남
지도교수의 영문표기 : Kil-Nam Chon
학위논문 학위논문(석사) - 한국과학기술원 : 전산학과,
서지주기 참고문헌 : p. 86-91
주제 Multiprocessors.
Virtual storage (Computer science)
가상 기억 시스템. --과학기술용어시소러스
다중 처리 장치 시스템. --과학기술용어시소러스
Memory management (Computer science)
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