서지주요정보
RTP를 이용하여 열처리한 polycide 구조에서 tungsten silicide 의 전기적 특성 = Electrical properties of tungsten silicide in polycide structure annealed by RTP method
서명 / 저자 RTP를 이용하여 열처리한 polycide 구조에서 tungsten silicide 의 전기적 특성 = Electrical properties of tungsten silicide in polycide structure annealed by RTP method / 민병운.
발행사항 [대전 : 한국과학기술원, 1990].
Online Access 제한공개(로그인 후 원문보기 가능)원문

소장정보

등록번호

8001351

소장위치/청구기호

학술문화관(문화관) 보존서고

MMS 9014

휴대폰 전송

도서상태

이용가능(대출불가)

사유안내

반납예정일

리뷰정보

초록정보

Tungsten silicide films ($WSi_{x$}) on heavily doped n-type polysilicon layer deposited by low-pressure chemical vapor deposition (LPCVD) method were annealed by rapid thermal process in a nitrogen atmosphere. Electrical properties of annealed specimens have been investigated by measurements of electrical resistivity, Hall voltage and Capacitance-Voltage along with analyses of X-ray diffraction patterns, SEM photographs and depth profiles by secondary ion mass spectrometry (SIMS). The electrical resistivity of the specimens decreases with increasing annealing temperature or time, and the reached to 168 μΩ-cm in the specimen annealed at 1000℃ for 15 seconds. The X-ray and SEM analyses indicated that crystallization of tetragonal $WSi_{2}$ takes place and grain size increases with increasing annealing temperature. These results suggest that the variation of electrical resistivity with annealing temperature is closely related to grain size. Hall measurements of the tungsten silicide films deposited by LPCVD on $SiO_{2}$/Si-substrate followed by thermal annealing show that the majority carrier is hole in all the tungsten silicide films independent of the annealing conditions. Hall measurements of tungsten silicide films in polycide structure, however, show that the majority carrier is electron in the specimens annealed below 950℃ while it is hole in the specimens annealed above 950℃. It appears that the negative Hall voltage observed in the tungsten silicide films in polycide structure that were annealed below 950℃ was caused by large contribution of Hall voltage by n-type polysilicon layer. From SIMS analyses, it was found that P, F and H elements diffuse outward and reside near the oxide films through annealing process. Capacitance-Voltage measurements show that flat band voltage shift to the right with increasing annealing temperature. It was considered that these variations result from decreasing work function difference ($\phi_{MS}$) caused by outdiffusion of P atoms and increasing fixed oxide charge ($Q_{f}$) caused by segregation of F atoms in $SiO_{2}$/Si-substrate.

서지기타정보

서지기타정보
청구기호 {MMS 9014
형태사항 iii, 54 p. : 삽화 ; 26 cm
언어 한국어
일반주기 저자명의 영문표기 : Byoung-Woon Min
지도교수의 한글표기 : 임호빈
지도교수의 영문표기 : Ho-Bin Im
학위논문 학위논문(석사) - 한국과학기술원 : 재료공학과,
서지주기 참고문헌 : p. 52-54
주제 Thin films.
Metals --Heat treatment.
Chemical vapor deposition.
전기적 성질. --과학기술용어시소러스
열 처리. --과학기술용어시소러스
화학 증착. --과학기술용어시소러스
박막. --과학기술용어시소러스
QR CODE

책소개

전체보기

목차

전체보기

이 주제의 인기대출도서