A C-V measurement circuit is designed and fabricated using BIC-MOS technology. The designed C-V measurement circuit which is composed of two common base PNP bipolar transistor and OP-AMP has several characteristics such as the fast operation and accurate measurement. In the designed circuit, PNP transistor with vertical structure is fabricated on the same chip with CMOS circuits. The base region of the PNP transistor is formed by using Rapid Thermal Processing. The collector of the PNP transistor is the p-well of CMOS and emitter is formed at the same time as the source/drain of P-channel MOS. The current gain of the fabricated PNP transistor is 30. The parameters of the fabricated OP-AMP which is used to decrease the measurement error for small measured signal are also measured.
