The characteristics of GaAs film on (001) Si substrate tilted about 4˚ towards the [110] direction were investigated. GaAs films were grown by molecular beam epitaxy(MBE) on the Si (001) substrate using a modified two-step process, which involves the solid phase epitaxial growth of an amorphous GaAs buffer layer, abbreviated as SPE hereafter, instead of the crystalline one.
In the present modified two-step process, an amorphous GaAs film of ~12nm in thickness was first deposited at the substrate temperature of 80℃ with the low growth rate on the cleaned Si substrate. Then the substrate was heated above ~400℃ while the RHEED pattern was being observed. After crystallization (SPE) of the amorphous phase, the main crystalline GaAs layer was over-grown at ~580℃ with a higher growth rate. Reflection high energy electron diffraction (RHEED) with a ~20 KeV electron beam, incident on the samples along 〈110〉 azimuth at a glancing angle of a few degrees, was used for in-situ monitoring of the surface structure during heating and crystal growth. The overall crystalline quality of the resultant GaAs films was measured by Rutherford backscattering (RBS)/channeling of 2.75 MeV $^4He^{+2}$ ions, and a transmission electron microscopy (TEM) was employed for cross-sectional observation of the structural defects in the GaAs films on Si.
In as-grown samples, it has been found by TEM that ｛111｝, 〈112〉 microtwins (and/or stacking faults) were formed during the SPE growth stage and that most of the dislocations and microtwins were localized around the GaAs/Si interface, but some of the twins were extended upto the free surface. The overall crystalline quality of GaAs films grown by the SPE technique, estimated by RBS/channeling, was found to be nearly the same at the by the conventional two-step MBE. High-resolution electron micrographs have shown that misfit dislocations and stacking faults (and/or microtwins) have nearly the same densities on both the flat and the tilted step-rich surfaces. Between the observed 90˚ edge and 60˚ misfit dislocations the density of the latter was higher irrespective of the substrate tilt. This occurrence was explained by the difference in distribution on initial nucleating islands between the present and the conventional two-step MBE techniques.
GaAs buffer layer was varied to 2nm, 4nm, and 12nm thickness, and the main GaAs layer of ~0.5 μm in thickness was over-grown on top of SPE-grown buffer layer. The final GaAs films were investigated by RBS/channeling, TEM, and double-crystal X-ray diffractometry(DXRD). The results show that the buffer layer thickness has effected not only the surface morphology but also the crystallinity of over-grown GaAs films. In this study, the optimum buffer layer thickness is found to be 4 ~ 12nm.
A part of the samples were rapidly thermal annealed (RTA) at 700 ~ 900℃ for 10s face down on a clean GaAs substrate in $N_2$ gas atmosphere. As a result of the ex-situ RTA at 900℃ for 10s, stacking faults(and/or microtwins) is found to be eliminated entirely, and the dislocation density in the GaAs films was reduced by 2 ~ 3 fold. Also, all of the end product misfit dislocations are found to be 90˚ pure edge dislocations, which are periodically spaced along the interface. In this study, the optimum RTA temperature was found to be 800℃.
Finally, the lattice image simulation of the proposed atomic models of stacking faults were performed using TEMPAS simulation program and they were compared with the observed high-resolution TEM micrograph. Also, the observed stacking faults annihilation phenomena were discussed using the dislocation reaction.
