An efficient and simple method for cache coherence tests on tightly coupled multiprocessor computer systems is presented in this thesis. It is very difficult to test cache coherence because of the transparency of cache to software. This problem has been partially solved by the specially embedded test hardware or simulation methods, but those methods are nnot sufficient to test cache coherence, independent of specific implementation protocols. Also, there has been no known methods to validate cache coherence protocols in systems after implementation.
This thesis defines the cache functional states and state transitions and the cache coherence faults model (static state transition faults model and dynamic state transition faults model) and propose the very first cache coherent validation method based on this model, which can be used in on-line tests independent of implemented cache coherent protocols.
Proposed method was programmed by using C language and adapted in cache coherence tests on TICOM multiprocessor computer systems and cofirmed to be proper. This method can be efficiently used in the verification and validation of cache design and also used in long-run test and diagnostics for maintenance after implementations.
