At present, as the scaling down in CMOS technology continues up to tens of GHz of the $f_max$ or $f_T$, CMOS technology would be adoptable in RF applications, especially for the aspect of low cost and high level integration [1].
In this work, for the aspect of low-cost and system-on-a-chip, especially for the RF front-end of digital TV tuner, a low noise IF amplifier and a downconversion mixer are discussed. In addition, for a successful design of RF circuit using CMOS technology, an accurate device model is very important. To find out the optimum structure of MOSRETs, the analysis of the characteristics at high frequency is performed. The RFIC has been fabricated in ETRI 0.8$\mum$ CMOS technology on a high resistivity silicon substrate. The CMOS technology with high resistivity silicon substrate can reduce the substrate coupling loss and noise.
The measurements of RFIC are accomplished on on-wafer and packaged conditions. The IF amplifier has a power gain of 11 dB,$IIP_3$ of - 6.8dBm, and noise figure of 7dB. The down mixer has a power conversion gain of 12.4dB, $IIP_3$ of-6.8dBm, and noise figure of 14dB.
고저항 실리콘 기판 (High resistivity silicon substrate)을 사용한 ETRI0. 0.8$\mu$m CMOS 테크놀로지를 이용하여 디지털 텔리비전 튜너용 900MHz 저잡음 IF 증폭기와 하향주파수 변환기 (Down-conversion Mixer)를 설계 제작하였다. RF 대역에서는 소자의 특성이 매우 중요하기 때문에 소자의 잡음특성-바이어스전압-사이즈 관계를 분석하여 회로설계에 적용하였다.
IF 증폭기의 전력이득은 11dB, $IIP_3$ =-6.8dBm, 그리고 NF = 7 dB의 측정결과를 얻었으며, 하향주파수 변환기는 길버트 셀 ( Gilbert cell)을 기본으로 하는 Double-balanced 구조로 설계되었으며, 선형특성을 개선하기 위하여 Current-injection기법과 Source degeneration 기법을 동시에 적용하였다. 하향주파수 변환기의 전력이득은 12.4 dB, $IIP_3$ = -6.8dBm, 그리고 NF = 14dB 의 측정결과를 얻었다.
