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Highly linear CMOS RF amplifier using transconductance cancellation and its volterra series analysis = 트랜스컨덕턴스의 비선형성 상쇄를 통한 고선형 CMOS 고주파 증폭기의 제작과 볼테라 해석
서명 / 저자 Highly linear CMOS RF amplifier using transconductance cancellation and its volterra series analysis = 트랜스컨덕턴스의 비선형성 상쇄를 통한 고선형 CMOS 고주파 증폭기의 제작과 볼테라 해석 / Bon-Kee Kim.
발행사항 [대전 : 한국과학기술원, 2001].
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8012342

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학술문화관(문화관) 보존서고

DEE 01012

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This thesis consists of three parts, which deal with linearity enhancement method for CMOS RF amplifiers. First part investigates various topologies which are suitable for highly linear amplifiers, such as common source, source follower, and push-pull structure using MESFET and balun. Complementary CMOS parallel push-pull (CCPP) amplifier topology is also proposed. Prototype CCPP amplifier is implemented using 0.5㎛ CMOS process, and the linearity performance is measured. Although its gain characteristic is not much inferior to that of common source amplifier, linearity enhancement is not sufficient. This is because that $g_m''$ values of NMOS and PMOS are both negative, and are not cancelled each other. Moreover, low gain of PMOS at RF band has negative effect on $OIP_3$ of RF amplifiers. In the second part, a simple linearization technique using multiple gated common source transistors is proposed where gate width and gate drive ($V_{gs}$ - $V_{th}$) of each transistor are chosen to compensate for the nonlinear characteristics of the main transistor. To demonstrate the feasibility of this approach, a prototype double gated RF amplifier using two MOSFET is implemented and its RF characteristics are compared with those of single one. The results show that, compared with conventional single gate transistor amplifier, the 3rd order intermodulation $(IMD_3)$ is improved by 6 dB with similar gain, fundamental output power, and DC power consumption. Because the auxiliary transistor is smaller than the main one and biased at subthreshold, adding this does not affect amplifier characteristics appreciably other than the nonlinearity. Using this linearization method, MMIC amplifier is also fabricated. The linearity figure of merit $(IP_3/DC power consumption)$ is increased more than 3 dB, and this means that less than half of DC power consumption is needed to obtain the same linearity performance. The last part is devoted to the nonlinear Volterra series analysis of proposed linearized amplifier. The calculation results coincide with the simulation results using HPADS harmonic balance simulator with BSZIM3ν3MOSFET model. The nalysis shows that the $g_m$ nonlinearity dominates the $IP_3$ performance of CMOS RF amplifier. The importance of second order nonlinearity of $g_m$ is verified. It also shows that the proposed linearization method can enhance $IP_3$ by amount of more than 10 dB with proper harmonic termination.

서지기타정보

서지기타정보
청구기호 {DEE 01012
형태사항 iv, 136 p. : 삽화 ; 26 cm
언어 영어
일반주기 저자명의 한글표기 : 김본기
지도교수의 영문표기 : Kwy-Ro Lee
지도교수의 한글표기 : 이귀로
수록잡지명 : "A new linearization technique for MOSFET RF amplifier using multiple gated transistors". IEEE microwave and guided wave letters, Vol. 10, No. 9, pp. 371-373 (2000)
학위논문 학위논문(박사) - 한국과학기술원 : 전기및전자공학전공,
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