In This thesis, a sequential algorithm for timing recovery are proposed for SDMA systems with adaptive antenna array. In SDMA systems signals encounter multi-access-interference and noise. A problem encountered with such signals is that the interference signal may cause symbol timing offset with conventional symbol timing recovery.
The algorithm presented here overcomes this problem by employing a two stage architecture where each stage consists of a conventional timing recovery and a combiner that reduces interference. Computer simulations using signals with the IS-136 format are presented to demonstrate the properties of the sequential algorithm.