In this paper, we presented the system level performance analyzer, POPeye and compared the performance of VCM and SDRAM. VCM showed the higher performance for various applications than that of SDRAM's about 20%. Also we proposed VPM(Virtual Pipelined Memory), a new DRAM Architecture with fast Row-cycle using Top-down approach with POPeye.
VPM has VCM's channel structure and its background operations are optimized by high level simulation with POPeye. Fast row-cycle is possible by adopting pipeline structure at row path. Row buffer below the sense amp. and inserted latch at the output of address decoder consists of the pipeline stage. VPM has backward compatibility with conventional memory system in a view of interface and also consumes less power by partial activation of Cell Core. The performance of VPM is higher than that of SDRAM about 40% and VCM about 20%.