The UniMIN (Universal Multistage Interconnection Network) is a distribution switch architecture with simple expandability and low complexity. In this thesis, a distribution switch module is implemented using six Xilinx field programmable gate arrays (FPGAs). The switch module has a switch size of 8x8 and operates at a speed of 20MHz. An internal test signal generator is also implemented at the same printed circuit board and is utilized to verify its operations for unicast cells, multicast cells, multicast control cells, and empty cells. This FPGA implementation result can be utilized in designing ASIC (Application Specific Integrated Circuit) chips of the UniMIN switches.