Most DSP Core have been designed with fixecd architecture and their system software including compiler too. So the codes generated by these compilers use all functional units in the core. In modern DSP design, a new method is performed that the designer can change architecture - bit-width, existence of functional units, size of register files, etc. - easily in MetaCore design environment for the purpose of optimal design for various DSP application systems.
In that case, the compiler of that core must be also retagrettable. That is, the generated codes have to use instructions supported by only usable functional units and satisfy bit-width conditions too. The MetaCore compiler gets the information about modified architecture using parameter file when the application programs are being compiled. The other side the designer can acquire the information that what kinds of hardware blocks are needed and what number of registers is appropriate for some application using architecture simulator and compiled codes generated by MetaCore compiler about several combinations of architecture parameters. All these things make it possible to minimize hardware cost and time-to- market.