In this thesis work, we implement a Tunable Frequency Down Converter(TFDC) for frequency down conversions, and a Reference Signal Generator(RSG) for stable local signal.
The TFDC circuit provides frequency conversions from first 70+/-20MHz IF signal to last 384KHz IF signal by using two same frequency mixers. Experiment is fulfilled first in segmented modules and later integrated into one. The input signal is BPSK/QPSK modulated. Specific SAW filters are used to improve frequency cutoff characteristics, but insertion loss of the passband is a little increased. Some -3dB attenuators are used to reduce voltage standing wave ratio(VSWR) and to prevent signal power saturation of followed amplifiers. The inserted amplifiers are used to match signal power level. A variable gain amplifier is used at the last step to reduce about 10dB of the dynamic range of the channel power level. This amplifier is digitally controlled by DSP using digital to analog converter(DAC).
The 42MHz local reference signal generator is implemented by one chip PLL synthesizer. The loop filter which influences on lock type, loop bandwidth, and loop gain is implemented using op amp. The voltage controlled crystal oscillator(VCXO) is used for VCO to provide high stable 42MHz local signal.
