Among the single-transistor type memory devices which contain ferroelectric thin films, the MFMIS(Metal Ferroelectric Metal Insulator Semiconductor)-structured device is expected to be free from the problem of the structural instability at the interface between the ferroelectric and the semiconductor material present in the MFS(Metal Ferroelectric Semiconductor)-structured device. In this thesis we have attempted to find the interplays between the ferroelectric and the semiconductor materials of the MFMIS -structured device. In detail, the MFMIS FET, which uses the ferroelectric material as a part of the gate structure, show a memory window in the curve measurement. Thus we have investigated the memory window by a computer-aided simulation technique and tried to express it as a form of an analytic function.
To calculate the polarization of the ferroelectric material we use three-different phenomenological models. These three different models lead to the same equivalent circuit when the non-linear hysteresis behavior of the polarization and the linear one are considered together. Meanwhile, in the semiconductor the surface space charge is calculated based on the sheet charge model.
When the gate bias sweeps, the semiconductor capacitance is found to show a big change and affects the memory window present in the C-V curve of the MFMIS-structured device. Also it is learned that the magnitude of the memory window is approximately the twice of the true coercive voltage which is intrinsic value of the ferroelectric materials.
In addition, by comparison of the curve of P-V$_F$ with that of C-Vg, it is found that the depletion region of the semiconductor occupies only a small region of the ferroelectric hysteresis loop near the coercive voltage.
