The solid phase crystallization of amorphous Si thin films and the formation mechanism of crystallites observed in as-deposited mixed-phase silicon thin films deposited by low pressure chemical vapor deposition were studied using a transmission electron microscope. Furthermore to reduce the crystallization time of amorphous Si films, Al-induced crystallization of an a-Si thin film in the Al/native-$SiO_2/a-Si$ structure and crystallization of $Si/Si_{0.7}Ge_{0.3}/Si$ triple layer were investigated. TFTs that used the $Si/Si_{0.7}Ge_{0.3}/Si$ triple layer as an active layer were fabricated and device characteristics of them were compared to those of Si TFTs and of SiGe TFTs.
The solid phase crystallization of the amorphous silicon thin films, deposited on $SiO_2$ at 520℃ by low pressure chemical vapor deposition and annealed at 550℃ ambient, was carried out, so that the grain growth mechanism, various types of defects, and origins of defects formation could be defined on an atomic level. A crystallite formed at the initial stage of the crystallization had a circular shape and the grains grew preferentially in one direction. In all the grains, there were twins of which {111} coherent boundaries were parallel to the long axis of the grain. In addition to twins, the following defects were observed in the grain: intrinsic stacking faults, extrinsic stacking faults, perfect dislocations, extended screw dislocations, and Shockley partial dislocations. These defects were formed by the following reasons: the errors in the stacking sequence at the amorphous/crystalline interface, jumps of a twin plane, intersecting of two crystal growth fronts slightly misoriented, and intersecting of two twin planes at the amorphous/crystalline interface. Not only twins but also stacking faults accelerated the growth rate of the crystalline silicon preferentially in the <112> direction along the {111} plane. Then the shape of a silicon grain elongated in the direction parallel to the twin plane and the stacking fault plane. As a result, the grains had a branched elliptical or a dendritic shape.
The formation mechanism of crystallites observed in as-deposited mixed- phase silicon thin films was proposed. Crystallites were observed at the $Si/SiO_2$ interface in the as-deposited film deposited at 570℃ and at 200 mTorr for 28 min. Their size was about 20 nm and they had an irregular shape. Density of crystallites in the as-deposited mixed-phase film was about $4×10^{10}/㎠$, but that in the film deposited as an amorphous and then annealed at 570℃ for 2 h was about $2×10^9/㎠$. No remarkable crystal growth occurred in the film deposited at 570℃ for 28 min and then annealed at 570℃ for 1h. Two kinds of crystallites were observed in the film annealed at 570℃ for 3h. The first observed at the $Si/SiO_2$ interface had an irregular shape and the second grown through the entire thickness of the film had an elongated elliptical shape. On the basis of above results, it was proposed that crystallites observed in as-deposited silicon thin films were formed not because silicon films deposited as an amorphous phase had been annealed during the deposition process, but because silicon films were deposited as a crystalline phase at the initial stage of the deposition process and then deposited as an amorphous phase after the initial stage of the deposition process.
Al-induced crystallization of an a-Si thin film in the Al/native-$SiO_2/a-Si$ structure was investigated. The a-Si thin film was crystallized partially at 250℃ and completely at 500℃ after 30 min. Lattice fringes of Si {111} were observed in some regions of the original Al layer and the interfacial native $SiO_2$ layer was disrupted by penetration of lattice fringes of Si {111} near those regions after the annealing process. From the above results it is concluded that Al and Si atoms interdiffused through the native oxide layer and then diffused Al atoms accelerated crystallization of the a-Si film. As a result, Al-induced crystallization of the a-Si thin film occurred even though the native $SiO_2$ layer was not removed completely at the poly-Al/a-Si interface. A possible model that can be used to explain the MIC phenomena by taking into account the changes that take place near or within a native $SiO_2$ layer during the annealing process was proposed.
A novel approach that can reduce the thermal budget in the fabrication of thin film transistors (TFTs) was proposed. Crystallization behavior of a $Si/Si_{0.7}Ge_{0.3}/Si$ triple layer is described and device characteristics of TFTs that used the $Si/Si_{0.7}Ge_{0.3}/Si$ as an active layer were presented. The $Si/Si_{0.7}Ge_{0.3}/Si$ triple film was completely crystallized only after 25 h anneal at 550℃. They have an average grain size of 0.7㎛. N-channel poly-TFTs were fabricated in the crystallized $Si/Si_{0.7}Ge_{0.3}/Si$. Compared to a poly-Si TFTs technology, shorter time processing capability could be obtained at little expense to device performance. A field- effect mobility of 58㎠/Vs, a threshold voltage of 5.2 V, an $I_{on}/I_{off}$ ratio of $5.7×10^6$, the minimum leakage current of 0.5pA/㎛, and a grain boundary trap density of $9.6×10^{11}/㎠$ were obtained after hydrogenation.
