In This thesis work, we implement a baseband π/4-DQPSK wireless modem algorithm in real time using a DSP chip. The modem algorithm is capable of transmitting a data sequence at the symbol rate of 4.8kHz. The total transmission rate of the modem is 9.6kbit/s.
In the transmitter, the roll-off factor of the square root raised cosine shaping filter is set to 0.35. The modulated output signal is upsampled by eight times the sample rate. This signal is fed to a radio frequency(RF) module of 236.715MHz. At the receiver side, the baseband signal at the RF module output is sampled at four times the symbol rate. After matched filtering the receiver input sampled signal, the DSP processes the signal to recover the transmitted information data sequence.
The baseband modem receiver includes the functional blocks for timing recovery, synchronization, frequency drift compensation, and decoding. We implement the timing recovery block to have fast convergence suitable for burst mode transmission. The synchronization block uses synchronization words for compensating phase offset. The frequency drift is compensated in a decision-directed fashion.
The wireless modem algorithm is simulated and then implemented using an Analog Devices' ADSP-21020 floating point DSP chip.
