The field programmable gate array (FPGA) is essential for obtaining a rapid implementation of digital systems. To make permanent connection in the wiring channels, voltage programmable links are generally used. The link can be formed by the breakdown in dielectric and the connection between metal electrodes. The dielectric can be ruptured to form a conductive link by applying a programming voltage.
Several metal-insulator-metal (MIM) structures have been investigated for applying an antifuse module to integrated device technologies. Silicon oxide, silicon nitride, or amorphous silicon are used as an insulator in MIM structures. The works have been mainly conducted to obtain a low programmed antifuse resistance by forming metal links through the dielectric layer.
The dielectrics are usually deposited by sputtering technique, because the technique has several advantages such as good adhesion and uniform thickness over large planar area. Furthermore, low temperature deposition is prefered to avoid interactions with substrate material during deposition. However, an annealing step after the low temperature deposition is indispensable for recovery of the characteristics of dielectric material and improvement of the interfacial state between dielectric and substrate.
The first part of this work investigated the effects of annealing temperature on the interfacial reactions and the antifuse I-V characteristics of ultra thin $SiO_2$ layer deposited on $Ti_{0.1}W_{0.9}$ substrate. The interfacial reactions were analyzed using X-ray photoelectron spectroscopy (XPS) and Auger electron spectroscopy (AES) with the samples which were in-situ annealed under ultra high vacuum or ex-situ annealed in a nitrogen atmosphere. The surface of the $Ti_{0.1}W_{0.9}$ substrate was oxidized during sputter-deposition of $SiO_2$ layer. Ti-oxides and W- oxides consisted of $Ti_2O_3$ ($Ti_3O_5$), $TiO_2$, $WO_2$, and $WO_3$. The $WO_3$ and $Ti_2O_3$ decomposed into metallic W and Ti at 400 and 500℃, respectively. The breakdown voltage of the antifuse decreased as the annealing temperature increased, due to the thinning of dielectric layer resulting from the decomposition of Ti-oxides and W-oxides. Annealing at 600℃ caused a reaction between metallic (Ti, W) layer and $SiO_2$ layer and elemental silicon was formed in the dielectric layer, where the $SiO_2$ layer completely lost its dielectric property. The lost of dielectric property might be resulted from the formation of a metallic channel in the $SiO_2$ film, which mainly contains metallic W, Ti, and Si.
The second part of the work proposed new antifuse structure of planar type. In this structure, the dielectric layer was formed by a high temperature thermal oxidation of poly silicon layer. Therefore, post annealing step after the dielectric formation is needless to improve device characteristics. Feuthermore, the smaller programmed resistance was obtained. The metal link formation by mass transfer of an electrode material was investigated. Aluminum was used as a metal electrode and 9 nm thickness of silicon dioxide was used for inter-dielectric. The resistance as low as 20 Ω was obtained with this new planar type antifuse structure after applying 10 V of programming voltage. After applying a programming voltage, the electrodes were connected by the mass transfer of aluminum through the poly silicon pad. Below the programming voltage, SEM image analysis revealed that a band-like filament observed in the doped-poly silicon pad corresponded a conductive metallic connection between the electrodes and it mainly consisted of Al and Si. The band-like filament grew from the positive electrode to the negative electrode, when the filament approached near the negative electrode. The filament suddenly connected to the negative electrode and a large current flew, when metallic link formed by a Al mass transfer. The formed link is about 1 ㎛ wide and 400 nm thick under 10 V programming condition.
The third part of this work investigated the programming mechanism of antifuse device with planar type. The observed aluminum filament below programming voltage, was revealed to be formed by grain boundary diffusion of aluminum in poly silicon pad. This was confirmed by annealing the aluminum/poly silicon pad system to observe the diffuse- in phenomenon of aluminum into poly silicon. The annealing treatment carried the same effect as the applying voltage, because the applying voltage raised the temperature of system by the resistive heating. The poly silicon pads of undoped, B-doped, and P-doped were used for this experiments. With undoped poly silicon, slight penetration of aluminum through the grain boundary was observed. But with the B-doped poly silicon, complete path of aluminum through the grain boundary was formed. And the formation of $AlB_2$ compound was revealed by X-ray diffraction, XPS and AES. The segregated boron in the grain boundary of poly silicon easily formed $AlB_2$ compound with aluminum and this $AlB_2$ formation accelerated the in-diffusion of aluminum through the grain boundary of poly silicon. But with the P-doped poly silicon, no layer structural change or in-diffusion of aluminum were found. From these results, the easy formation of the metal link in the B-doped poly silicon pad was attributed to the easy penetration of Al into the the grain boundary of poly silicon pad by the formation of $AlB_2$.
