A novel epitaxial layer structure with a GaAs/AlGaAs superlattice buffer layer is proposed for high efficiency and low distortion GaAs power MESFET's. Active channel is designed as a low-high doped structure and the GaAs power MESFET's are designed and fabricated on the channel. The effect of the buffer structure on efficiency and linearity of power amplifier is investigated by analyzing the transconductance and drain conductance dependent on gate bias, drain bias, and frequency through the I-V and S-parameter measurements. It is confirmed using the simulations of the 2-dimensional device simulator that the GaAs/AlGaAs superlattice buffer layer acts as a role to confine electrons in channel layer and provide an effective barrier for hot electrons induced by high electric field to the substrate layer.
A power MESFET with the superlattice buffer has transconductance of 80% higher than that with an undoped GaAs buffer and it has drain conductance of 40% lower than that with an undoped buffer at operating bias of a class AB power amplifier. The superlattice buffer shows a low frequency dispersion of drain conductance in comparison with both the undoped buffer and Be doped one. The gate-to-drain breakdown voltage is measured to be 28V. Transconductance is very uniform with gate bias. The interface between superlattice buffer and high-doped channel layer is found to be degraded by Si-donor impurity diffusion. An electron trap is identified by Deep Level Transient Spectroscopy(DLTS). Therefore, the buffer structure is optimized with an undoped GaAs buffer on the superlattice buffer to improve linearity by reducing concentration of the electron trap. The optimized thickness of an undoped buffer is determined to be between 100Å and 300Å. The power MESFET with the optimized superlattice buffer shows output power of 1dB higher than that with an undoped buffer layer and efficiency increment of 3% compared to undoped buffer and IM3 reduction of 3dB.
A high efficiency and low distortion GaAs power amplifier is designed and fabricated for the application of analog/digital cellular phones. For the circuit design, the optimum load and source impedances are determined by the trade-off between the power performance and linearity using load-pull method, a loss of drain bias circuit is reduced by a short microstrip line instead of a λ/4 transmission line, and harmonics are reduced using short circuits for the 2nd and 3rd harmonic frequencies. It consists of the power MESFET's with the optimized superlattice buffer structure and two stage amplifiers to obtain a small-signal gain of more than 31dB. The fabricated amplifier shows an output power of 31.5dBm and a power-added efficiency of 61% for AMPS mode. The third-order intermodulation of -32dBc and power-added efficiency of 30% are obtained at an output power of 26 dBm. The most significant result is simultaneous achievement of high efficiency and low distortions. These results are attributed to linear power MESFET's and a harmonic suppression circuit in the output matching circuit. Therefore, the proposed structure is good for high efficiency and linear power MESFET's.
